For once, not a post of 'How do I get XP to do.....'
I've been tinkering lately with a hardware product that uses a CRC based authentication system. My goal is to simulate the system in software as a proof of concept to it's insecurity since they claim you cannot duplicate the hardware (I have significant reason to believe otherwise).
Without getting into specifics of the product (public forum after all), A challenge is issued, computed through a CRC algorithm incorporating some other 'secret' information and a response is generated. The challenger also computes this value and access is based on both values matching.
Rolling timing, different serial numbers and secret seed values add and obvious level of possibilities to the resulting output. However, patent docs have provided me a map of the mechanics of the algorithm (though not the secret values, but it's a start). CRC's, XOR gates and bit shifting is not something I've messed around with before and reading the patent makes me go cross eyed trying to track where all the bits are going:
I'm willing to admit I'm in over my head. I'm not very familiar with machine logic, gates, etc. However, I'd like to learn. Anyone have any resources for learning about all this bit shifting, CRC's, etc. I'd love to know about it. Most of the stuff I have found is usually way over a beginners head.
Any old text books lying around form comp sci days?
Big request, I know. Hopefully not to big.
Render
I've been tinkering lately with a hardware product that uses a CRC based authentication system. My goal is to simulate the system in software as a proof of concept to it's insecurity since they claim you cannot duplicate the hardware (I have significant reason to believe otherwise).
Without getting into specifics of the product (public forum after all), A challenge is issued, computed through a CRC algorithm incorporating some other 'secret' information and a response is generated. The challenger also computes this value and access is based on both values matching.
Rolling timing, different serial numbers and secret seed values add and obvious level of possibilities to the resulting output. However, patent docs have provided me a map of the mechanics of the algorithm (though not the secret values, but it's a start). CRC's, XOR gates and bit shifting is not something I've messed around with before and reading the patent makes me go cross eyed trying to track where all the bits are going:
The shift register 43 consists of the input data flip-flop 44, the internal flip-flops 52 and the output data flip-flop 60. These flip-flops, 44,52,60, represent the bit positions of the resulting encoded bit stream. A preferred embodiment according to this invention has sixteen XOR's and, except for 68, are labeled collectively as 50. All XORs 50 have one input tied to the output of one of the shift register 43 flip-flops 44, 52 or 60.
Any old text books lying around form comp sci days?
Big request, I know. Hopefully not to big.
Render
Comment