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  • Cell architecture explained

    Here's a 5-part article explaining the architecture of the Cell processor which will power the PlayStation 3, a new generation of consumer electronics devices, and hopefully the next generation of Macs:

    http://www.blachford.info/computer/Cells/Cell0.html
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  • #2
    Originally posted by bascule
    ...and hopefully the next generation of Macs..[/url]
    Its Apple, they always go for cool things like this. :)

    Its funny that the first thing to really show off the next generation in processing technology is a gaming console. It really makes alot of sense though, they are routinely pushed alot more to their limits than the home computer.
    The dude abides.

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    • #3
      Originally posted by Xodia
      Its funny that the first thing to really show off the next generation in processing technology is a gaming console. It really makes alot of sense though, they are routinely pushed alot more to their limits than the home computer.
      Im am not sure if that is true. In fact if you use benchmark's while running games on your PC you will see that your system resources are severely taxed when playing the latest games as opposed to the home consoles that running games is their sole purpose and therefore manages its resources better. I have often heard though that it is the game itself though that deals with the consoles limits not the hardware.
      Did Everquest teach you that?

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      • #4
        the first round of games that come out are always the suckest (word?) because they don't use all the API's of the new game system. So it is true that the game does kinda make the system. Take for example Tony Hawk (the first one) it was for PS1 and it was really good with graphic's for a PS1, but they used EVERY API extension to get it there.

        with this cell CPU stuff, people will still get a great game, even in the first batch, cuase it just handles the load (even in old style programing mode) so much better, cuase the APU's were designed for fast vector graphic's.

        Then again this could all be vaporware hype to get us pumped about PS3. Sill good concept though (Cell CPU).
        "Never Underestimate the Power of Stupid People in Large Groups"

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        • #5
          Sony is not usually one for vaporware. Now if this were Xbox we were talking about, that would be almost universally accepted as vaporware.
          There once was a Windows box with no firewall. Keyword is, there once was.

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          • #6
            Here's a deconstruction of that article by ArsTechnica's own Hannibal:

            http://arstechnica.com/news.ars/post/20050124-4551.html

            Some nitpicks but a lot of good points
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            • #7
              The Cell core:


              The makeup of one of the 8 Synergistic Processor Elements (SPEs) on the Cell processor:


              So Cell is a PowerPC processor clocked at 4GHz+ with 8 SPEs. SPEs are 64-bit processors which take 128-bit operands. The entire processor boasts a peak 250+ GigaFLOPS of power
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              • #8


                That's pretty damn small for supporting 9-way hardware parallelism... as many transistors as a dual core P4 and an order of magnitude more GigaFLOPS.

                I can't wait until Apple gets these into an OS X workstation. Can you imagine the power of the 8 SPEs leveraged for media production? Or into the Xserve and used for scientific computing clusters.

                I can imagine if the PS3 is ever hacked there will be quite a few people interested in building scientific computing clusters out of them. The PS3 will provide a ridiculous amount of computing power in a very small package, providing 9-way hardware parallelism and a processor-integrated high speed interconnect bus. Those words are enough to make the most elitist of computing consumers drool...
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                • #9
                  Nine ways, right...

                  It's not quite a nine way CPU. Only one of core is a real CPU, the other 8 are specialized. It's kind of like a G5 (PowerPC 970FX) with 8 Altivec units instead of one.

                  Now, one of those SPE's could do some kick ass physics simulation and a bunch of really cool effects that current CPUs just can't do. I understand that output of one SPE can be chained to the input of another (maybe not automagically, but it's possible) and this could have some really cool effects as well. I expect to see some really cool dynamic weather effects and realistic shadows and that kind of stuff.

                  In scientific computing those things could be the bomb for anything that fits in the limited ram of an SPE. I wouldn't be suprised if some libs (say LAPACK) were optimized to use all that parallelism.

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                  • #10
                    Originally posted by AlexCV
                    It's not quite a nine way CPU. Only one of core is a real CPU, the other 8 are specialized. It's kind of like a G5 (PowerPC 970FX) with 8 Altivec units instead of one.
                    Not at all. The only thing lacking which would differentiate it from a "real" CPU is hardware branch prediction. AltiVec is just a single vector execution unit... SPEs have their own execution pipeline which can decode instructions (with simple Pentium-like two way parallelism), their own MMU, load store units, vector processing units (i.e. every SPE has its own simplified AltiVec-like execution unit), floating point units, integer units, etc. It's essentially a self-contained static-issue RISC processor, similar to the PPC 601.

                    Now, one of those SPE's could do some kick ass physics simulation and a bunch of really cool effects that current CPUs just can't do. I understand that output of one SPE can be chained to the input of another (maybe not automagically, but it's possible) and this could have some really cool effects as well. I expect to see some really cool dynamic weather effects and realistic shadows and that kind of stuff.
                    Every SPE can address the 256kB of local memory of any other SPE over the Element Interconnect Bus, as can the central PPC core. What I see as the real advantage of this setup is for the PPC core to swap threads on and off of the SPEs, so you could have hundreds of threads stored in system memory with 8 executing at any given time on the SPEs.

                    In scientific computing those things could be the bomb for anything that fits in the limited ram of an SPE. I wouldn't be suprised if some libs (say LAPACK) were optimized to use all that parallelism.
                    My real hope would be that if Apple adopts Cell that IBM will release an optimizing Fortran compiler which can auto-parallelize FOREACH loops across multiple SPEs. The inner loops of our model, RAMS, are implemented in this manner.
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